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Items where Author is "Assaad, Maher"

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Number of items: 11.

Citation Index Journal

Assaad, Maher and Yohannes, Israel (2013) A four-colour optical detector circuit. [Citation Index Journal]

Assaad, Maher and Boufouss, Elhafed and Gerard, Pierre and Francis, Laurent and Flandre, Denis (2012) Design and characterisation of ultra-low-power SOI-CMOS IC temperature level detector. [Citation Index Journal]

Assaad, Maher and Alser, Mohammed (2012) Design of an All-Digital Synchronized Frequency Multiplier Based on a Dual-Loop (D/FLL) Architecture. [Citation Index Journal]

Article

Assaad, Maher and Yohannes, Israel (2011) Design and characterization of multi-color sensor circuit. IEICE Electronics Express .

Assaad, Maher and Alser, Mohammed (2011) An FPGA-based design and implementation of an all-digital serializer for inter module communication in SoC. IEICE Electronics Express .

Book

Assaad, Maher (2009) Design and Modeling of PLL Based CDR for Inter Chip Communications. VDM Verlag. ISBN ISBN-10: 3639185544

Conference or Workshop Item

Alser, Mohammed and Assaad, Maher and Hussin, Fawnizu Azmadi and Bayou, Israel Yohannes (2012) Design and FPGA Implementation of PLL-based Quarter-rate Clock and Data Recovery Circuit. In: 4th International Conference on Intelligent and Advanced Systems (ICIAS 2012), 12-14 June 2012, Kuala Lumpur.

Boufouss, Elhafed and Francis, Laurent and Gerard, Pierre and Assaad, Maher (2011) Ultra low power CMOS circuits working in subthreshold regime for high temperature and radiation environments. In: International Conference and Exhibition on High Temperature Electronics Network (HiTEN).

Assaad, Maher (2010) Ultra low power, harsh environment SOI-CMOS design of temperature-sensor based threshold-detection and wake-up IC. In: IEEE 2010 INTERNATIONAL SOI CONFERENCE.

Assaad, Maher (2008) 20 GB/S REFERENCELESS QUARTER-RATE PLL-BASED CLOCK DATA RECOVERY CIRCUIT IN 130 NM CMOS TECHNOLOGY. In: Proceedings of the 15th International Conference MIXED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS.

Assaad, Maher (2007) CMOS IC Design and Verilog-A Modelling of 10-Gb/s PLL-Based Deserializer for Inter-Chip Communication in SOC. In: International Symposium on System on Chip.

This list was generated on Sun Aug 20 17:16:13 2017 MYT.