Design and characterisation of ultra-low-power SOI-CMOS IC temperature level detector

Assaad, Maher and Boufouss, Elhafed and Gerard, Pierre and Francis, Laurent and Flandre, Denis (2012) Design and characterisation of ultra-low-power SOI-CMOS IC temperature level detector. [Citation Index Journal]

[thumbnail of stamp.jsp_tp=&arnumber=6235155&tag=1] PDF
stamp.jsp_tp=&arnumber=6235155&tag=1 - Published Version

Download (1kB)

Abstract

Described are the design and characterisation of an ultra-low-power temperature level detector (TLD) and temperature sensor based on a silicon-on-insulator (SOI) CMOS integrated circuit (IC) for harsh environment applications. Since this IC is mainly for harsh environment applications (e.g. high temperatures and radiations), it has been designed and manufactured using the 1 μm high-temperature SOI-CMOS technology provided by X-FAB. The measured power dissipation of the TLD circuit is 9 mW at a supply voltage of 5 V and temperature of 27 °C, according to the measurement results of the manufactured design.

Item Type: Citation Index Journal
Subjects: T Technology > TK Electrical engineering. Electronics Nuclear engineering
Departments / MOR / COE: Departments > Electrical & Electronic Engineering
Depositing User: Dr Maher Assaad
Date Deposited: 07 Mar 2013 03:42
Last Modified: 25 Oct 2013 02:16
URI: http://scholars.utp.edu.my/id/eprint/9000

Actions (login required)

View Item
View Item