A Case Study for Reliability-Aware in SoC Analog Circuit Design

Mohd Azman, Abdul Latif and Zain Ali, Noohul Basheer and Hussin, Fawnizu Azmadi (2010) A Case Study for Reliability-Aware in SoC Analog Circuit Design. In: Intelligent and Advanced Systems (ICIAS), 2010 International Conference on , 15-17 June, 2010, Kuala Lumpur.

[img] PDF - Published Version
Restricted to Registered users only


Official URL: http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arn...


This paper provides a working knowledge of Negative Bias Temperature Instability (NBTI) awareness to the circuit design community for reliable design of the System-Ona-Chip (SoC) analog circuit. The reliability performance of all matched pair circuits, such as Bandgap Reference, is at the mercy of aging differential. Aging simulation (AgingSim) is mandatory to obtain realistic risk evaluation for circuit design reliability qualification. It is applicable to all circuit aging problems covering both analog and digital. Failure rate varies as a function of voltage and temperature. It is shown that PMOS is the reliability-critical device and NBTI is the most critical failure mechanism for analog circuit performance in sub-micrometer CMOS technology. We provide a complete reliability simulation analysis of Thermal Sensor DAC and analyze the effect of NBTI using aging simulation tool.

Item Type:Conference or Workshop Item (Lecture)
Subjects:T Technology > TK Electrical engineering. Electronics Nuclear engineering
Departments / MOR / COE:Departments > Electrical & Electronic Engineering
ID Code:4804
Deposited By: Dr Noohul Basheer Zain Ali
Deposited On:23 Mar 2011 05:41
Last Modified:19 Jan 2017 08:24

Repository Staff Only: item control page

Document Downloads

More statistics for this item...