Logo

Fundamental Approach in Digital Circuit Design for 1-MHz Frequency PWM Gate Drive Application

Yahaya, Nor Zaihar and Mumtaj Begam Kassim, Raethar and awan, mohammad and khalil, munirah (2011) Fundamental Approach in Digital Circuit Design for 1-MHz Frequency PWM Gate Drive Application. International Conference on Advanced Science,Engineering and Information Technology 2011 . pp. 453-457.

[img] PDF - Published Version
Restricted to Registered users only

260Kb

Abstract

This paper discusses the design of a digital programmable logic circuit to produce a 5 V - output square wave pulses for four high power MOSFET switches using a fixed PWM circuit. It will be applied to drive the synchronous rectifier buck converter (SRBC) circuit. The PWM signals with multiple fixed time delay of 15 ns, 232 ns, 284 ns and 955 ns are generated. The steps taken to analyze each propagation time delay of each logic gate used and its combination are carefully studied. A multiplexer is added at the output of the logic circuit to select and produce the desired output pulses of 20 % duty ratio. The logic outputs are compared with the analog pulses and results match each other within 1 % in difference.

Item Type:Article
Subjects:T Technology > TK Electrical engineering. Electronics Nuclear engineering
Departments / MOR / COE:Departments > Electrical & Electronic Engineering
ID Code:4396
Deposited By: Dr Nor Zaihar Yahaya
Deposited On:21 Mar 2011 03:07
Last Modified:19 Jan 2017 08:23

Repository Staff Only: item control page

Document Downloads

More statistics for this item...