Design & Simulation of an Improved Soft-switched Synchronous Buck Converter

Yahaya, Nor Zaihar and Begam , Mumtaj and awan, mohammad (2009) Design & Simulation of an Improved Soft-switched Synchronous Buck Converter. IEEE 3rd Asia International Conference on Modeling & Simulation . pp. 751-756.

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This paper proposes an improved soft switched synchronous buck converter in a fixed load condition. The switching energy can be fully recovered during current commutation phase in the gate driver while the diode conduction losses in the low and high side switches can be substantially reduced by employing additional L and C resonant in the circuit. Using PSpice simulation, the optimization technique has been studied. From the predetermined pulse width of the generated signals, the optimized resonant inductor current is observed to generate less oscillation and hence lower the switching loss. In addition, an optimized dead time interval is inserted between high side and low side of the transistors in the synchronous buck converter to minimize their body diode conduction losses. The detailed operations of both circuits are analyzed.

Item Type:Article
Subjects:T Technology > TK Electrical engineering. Electronics Nuclear engineering
Departments / MOR / COE:Departments > Electrical & Electronic Engineering
ID Code:4391
Deposited By: Dr Nor Zaihar Yahaya
Deposited On:07 Mar 2011 07:31
Last Modified:19 Jan 2017 08:25

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