Performance Analysis of Fixed Duty Ratio and Adaptive Gate Drive in High Frequency Gate Driver Design

The performance analysis of the Fixed Duty Ratio (FDR)
and Adaptive Gate Drive (AGD) in high frequency gate driver
design is analyzed in this paper. FDR is well known for its
simplicity. The limitation of this control scheme requires a longer
delay time before the next switching can be executed. As for AGD,
the delay adjustment can be controlled for different MOSFET.
However, it is hard to detect whether the MOSFET channel is fully
turned off before the adaptive delay can be applied. Simulation
using the Pspice circuit simulator is carried out to analyze the
performances of both control methods on the proposed
synchronous buck rectifier converter (SRBC) circuit. The findings
show the analysis in converter performance, advantages and
limitations of the methods. It is found that even though AGD is
known to be better in reducing dead time, using accurate settings of
FDR scheme may also introduce significant positive advantage to
the converter.