Implementation of real-time simple edge detection on FPGA

P., Sebastian and M.N.B.M., Shukor and H.H., Lo (2007) Implementation of real-time simple edge detection on FPGA. In: 2007 International Conference on Intelligent and Advanced Systems, ICIAS 2007, 25 November 2007 through 28 November 2007, Kuala Lumpur.

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The objective of this paper was to develop a real time hardware image processing system which is based on Field Programmable Gate Array (FPGA). The chosen image processing algorithms implemented was edge detection. This work utilizes Altera DE2 development board powered by Cyclone II FGPA pair with 1.3 Mega pixel CMOS camera from Terasic Technologies. Verilog HDL was used as the hardware programming language for a real-time edge detection system. The resulting edge detection images showed that a simple edge detection algorithm was implemented on Cyclone II FPGA for real-time image processing. ©2007 IEEE.

Item Type:Conference or Workshop Item (Paper)
Uncontrolled Keywords:Computer hardware description languages; Computer programming languages; Digital image storage; Field programmable gate arrays (FPGA); Image processing; Imaging systems; Logic gates; Optical sensors; CMOS cameras; Detection systems; Edge Detection algorithms; Image processing algorithms; Mega pixels; Processing systems; Programming languages; Real times; Verilog HDL; Edge detection
Subjects:T Technology > TK Electrical engineering. Electronics Nuclear engineering
Departments / MOR / COE:Departments > Electrical & Electronic Engineering
ID Code:391
Deposited By: Patrick Sebastian
Deposited On:09 Mar 2010 01:07
Last Modified:19 Jan 2017 08:27

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