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20 GB/S REFERENCELESS QUARTER-RATE PLL-BASED CLOCK DATA RECOVERY CIRCUIT IN 130 NM CMOS TECHNOLOGY

Assaad, Maher (2008) 20 GB/S REFERENCELESS QUARTER-RATE PLL-BASED CLOCK DATA RECOVERY CIRCUIT IN 130 NM CMOS TECHNOLOGY. In: Proceedings of the 15th International Conference MIXED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS.

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Item Type:Conference or Workshop Item (Paper)
Subjects:T Technology > TK Electrical engineering. Electronics Nuclear engineering
Departments / MOR / COE:Centre of Excellence > Center for Intelligent Signal and Imaging Research
Departments > Electrical & Electronic Engineering
ID Code:3530
Deposited By: Dr Maher Assaad
Deposited On:04 Jan 2011 07:47
Last Modified:19 Jan 2017 08:26

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