A wide-range programmable frequency synthesizer based on a finite state machine filter

Alser, Mohammed H. and Assaad, Maher M. and Hussin, Fawnizu Azmadi (2012) A wide-range programmable frequency synthesizer based on a finite state machine filter. International Journal of Electronics, 100 (11). pp. 1546-1556. ISSN 1362-3060

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Abstract

In this article, an FPGA-based design and implementation of a fully digital wide-range programmable frequency synthesizer based on a finite state machine filter is presented. The advantages of the proposed architecture are that, it simultaneously generates a high frequency signal from a low frequency reference signal (i.e. synthesising), and synchronising the two signals (signals have the same phase, or a constant difference) without jitter accumulation issue. The architecture is portable and can be easily implemented for various platforms, such as FPGAs and integrated circuits. The frequency synthesizer circuit can be used as a part of SERDES devices in intra/inter chip communication in system-on-chip (SoC). The proposed circuit is designed using Verilog language and synthesized for the Altera DE2-70 development board, with the Cyclone II (EP2C35F672C6) device on board. Simulation and experimental results are included; they prove the synthesizing and tracking features of the proposed architecture. The generated clock signal frequency of a range from 19.8 MHz to 440 MHz is synchronized to the input reference clock with a frequency step of 0.12 MHz.

Item Type: Article
Departments / MOR / COE: Centre of Excellence > Center for Intelligent Signal and Imaging Research
Depositing User: Dr Fawnizu Azmadi Hussin
Date Deposited: 07 Oct 2016 01:42
Last Modified: 19 Jan 2017 08:21
URI: http://scholars.utp.edu.my/id/eprint/11944

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