Al-Dujaili, Abdullah and Lo, Hai Hiung and Tan, Shawn (2015) ASH1: a Stack-Based Input/ Output Processor for USB Operations. In: IEEE International Conference on Circuit And Systems, 2nd Sep, 2015 to 4th Sep 2015, Langkawi.
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PDF (ICSyS2015)
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PDF
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PDF
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Abstract
This paper describes a work in progress: ASH1, an 8- bit input/ output processor (IOP) that is designed to be able to perform USB operations. It has a stack-based architecture where most of the operations are done on the top elements of the stack. The instruction set consists of 17 14-bit instructions optimized for framing and driving software code. ASH1 communicates with the main processing unit (Master CPU) through a wishbone bus. It has been proven reliably at 50 MHz in an Altera Cyclone II FPGA device. With around 1400 FPGA slices and a maximum clock frequency of 90 MHz, ASH1 could make a good substitute for big USB IP Cores. Future work includes making ASH1 MAC Ethernet capable and USB2 compatible.
Item Type: | Conference or Workshop Item (Paper) |
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Subjects: | T Technology > TK Electrical engineering. Electronics Nuclear engineering |
Academic Subject One: | Computer System Architecture |
Departments / MOR / COE: | Research Institutes > Megacities |
ID Code: | 11777 |
Deposited By: | Mr Hai Hiung Lo |
Deposited On: | 07 Oct 2016 01:42 |
Last Modified: | 07 Oct 2016 01:42 |
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